Via's twin-core processor may upstage AMD, Intel

In a move that could upstage the dual-core processor plans of Advanced Micro Devices and Intel, Via Technologies is developing a twin-core x86 processor that is likely to hit the market by June 2005, a company executive confirmed Tuesday.

A launch in June would give Via a shot at being the first company to introduce an x86 processor with two cores.

"We're pretty confident we'll have something by the end of the second quarter next year," said Richard Brown, Via's associate vice president of marketing, in Taipei.

The twin-core processor is primarily designed to be used in high-density server clusters. Via has demonstrated that two processors can fit onto a small Mini-ITX motherboard and it will be feasible for customers to offer a standard 1U server chassis containing two Mini-ITX motherboards running four twin-core processors, Brown said.

Via's twin-core processor contains two pieces of silicon - each with one Esther processor core on it - inside a single chip package, Brown said. By comparison, dual-core processors, which are being developed by AMD and Intel, put two cores on a single piece of silicon. Via also has plans to offer a dual-core chip, but that product is not expected to be available any time soon.

Announced in May, the Esther cores are manufactured by IBM using a 90 nanometer process. The 32 bit chips consume 3.5 watts when running at a clock speed of 1 GHz and will run at a clock speed of up to 2 GHz. Esther also incorporates Via's PadLock security technology that offers hardware-accelerated RSA encryption and support for NX (execution protection) anti-virus technology.

Via has not finalized the clock speed of the cores that will be used in the twin-core chips, Brown said.

Putting two cores, each on a separate piece of silicon, inside of a single package is not a simple endeavor and Via is currently working through issues such as heat and interference that must be resolved for the chip to work properly, Brown said. However, Via is confident these issues will be resolved, he said, noting that the dual-core approach presents its own set of challenges.

One of those challenges is production yield, Brown said. With two cores on each silicon chip, there is a greater chance that something can go wrong and the chips will not meet the required performance specifications.

The IDG News Service is a Network World affiliate.