Intel raises the bar in server chips with Nehalem

Intel's upcoming Xeon server chips incorporate significant advancements that could form the basis for future chips that could handle high-performance computing tasks, analysts said.

Slideshow: Take a closer look at Intel's Nehalem microarchitecture

The new Xeons are based on Intel's latest Nehalem microarchitecture, which improves system speed by cutting bottlenecks that plagued Intel's earlier chips.

The advancements are a step by Intel to build server chips that are able to run applications faster. Chip makers are consistently etching more complex features onto the surface of processors to handle a larger number of applications, which could reduce the need for extra components in servers.

Intel is due to launch the Xeon chips on March 30, and initial offerings will be targeted at workstations and servers. Apple and Lenovo have already announced workstations with dual- and quad-core Xeon chips, with server announcements from other vendors expected during the launch. Later this year Intel could release Nehalem-based chips with six cores and eight cores, according to the company's road map.

"Nehalem is a significant architecture that overcomes certain limitations Intel faced in the past," said Jim McGregor, chief technology strategist at In-Stat. "This is a much bigger jump than they have had in quite a big time."

Perhaps the most significant change is that the Xeon chips integrate a memory controller on the CPU, which gives the chip a faster path to communicate with the memory, said Dan Olds, principal analyst with Gabriel Consulting Group. It removes the memory latency that affected earlier Intel processors, which should translate to better server performance.

Data-intensive applications like video processing frequently require a processor to fetch information from memory, and Intel's earlier chips had to go through a bus called the front-side bus (FSB). After facing years of criticism, Intel removed the FSB and integrated the memory controller into the CPU with Nehalem chips.

Intel's rival Advanced Micro Devices has been integrating memory controllers on CPUs for many years, which gave it a long-standing performance advantage, said Roger Kay, founder and president of Endpoint Technologies Associates. Intel relied heavily on cache for improved performance, but the integration of the memory controller brings both chip makers to par in terms of technology advancements.

The improvement should also make it easier for Intel to take advantage of faster memory technologies like DDR3, McGregor said. Compared to existing DDR2-capable processors, the new DDR3-capable Xeon chips will be able to talk to memory quicker, leading to improved system performance.

Another significant technology advancement is the addition of the QuickPath Interconnect (QPI) technology, a point-to-point interconnect that provides the CPU with a faster pipe to communicate with other processors and system components, the analysts said.

QPI removes some old bottlenecks of Intel's earlier chip microarchitectures to improve system speed and performance per watt, Gabriel's Olds said. As cores are added, QPI will help servers execute more tasks in parallel and tackle larger workloads and more data-intensive applications that need a lot of bandwidth and processing power.

The IDG News Service is a Network World affiliate.