by Ben Ames

TI plans more efficient chips for mobile devices

News
Jun 12, 20062 mins

To handle high computing loads in multimedia handsets and smart-phones, Texas Instruments plans to build a faster, more efficient family of processors by 2008, the company announced Monday.

Texas Instruments, of Dallas, said it will move to a 45-nm semiconductor manufacturing process for its system-on-chip (SoC) processors, increasing performance by 30% while reducing power consumption by 40%.

By balancing the demands of performance, power consumption and transistor density, the chip will be best suited for mobile phone processors and digital signal processors, said Hans Stork, the company’s senior vice president and CTO.

Texas Instruments will use the new design to stay competitive with other chip makers as device manufacturers demand chips that support the convergence of communications and computing on mobile devices, and as the use of portable multimedia, gaming and productivity applications grows.

Faster chips could feed more frames per second to a mobile phone video display or allow wireless users to run simultaneous applications, such as playing a 3-D video game while holding a video conference with other players and sending e-mail in the background.

The design could also give Texas Instruments a manufacturing advantage over competitors, because it doubles the number of chips produced on each 300-mm silicon wafer.

The company’s claims of speed and efficiency are similar to those in an announcement made by Intel at the same conference, the Symposium on VLSI Technology in Honolulu.

Intel announced plans to build chips by 2010 that use “tri-gate transistors” to insulate electrical flow better, enabling a 45% increase in speed or a 35% reduction in total power used compared to the company’s current 65-nm process transistors.

The two designs share a technical approach. Both achieve their technical gains by reducing electrical capacitance through a combination of “strained silicon” and low-k (low-resistance), dielectric materials.

Both chips use the CMOS manufacturing infrastructure, but the hallmark of Texas Instruments’ SoC design is its ability to integrate many features onto a single chip, from digital radio frequency features to analog components such as resistors, inductors and capacitors.

Texas Instruments’ technique boosts transistor density by using immersion photolithography instead of dry lithography, allowing the company to shrink its 45-nm static RAM cell to just 0.24 square microns, smaller than competitors’ devices by as much as 30%, the company said.

Texas Instruments plans to build the new processors in its DMOS6 facility in Dallas, beginning production in mid-2008.