abednarz
Executive Editor

Silicon building blocks

Opinion
Feb 8, 20072 mins

* Content-processing technology from Tarari will help shape future acceleration gear

One good way to get a hint of what appliance makers have in store for tomorrow’s IT buyers is to find out what semiconductor companies are doing on the silicon front today. The capabilities of the ASICs and production boards that are appearing now will influence future versions of unified threat management appliances, database encryption accelerators, and content based routing switches, for example.

Among the vendors working to better the field is Tarari, an Intel spinoff which this week is expected to unveil its latest content processors. Tarari offers ASICs, production boards and embedded software components that are designed to snap in to networking appliances, blade servers and other systems to accelerate security encryption and content processing.

The company’s new T10 technology is geared for products that handle high-throughput security applications such as intrusion prevention and XML threat management. The technology can top out at 10Gbps performance, says Bob Lutz, product director for network security products at Tarari.

A key feature of the T10 line is that it uses DRAM memory to store content inspection rules; Tarari previously used SRAM memory, which is more expensive, for storing rules, Lutz says. Eliminating the SRAM memory helped Tarari expand the number of rules that can be used to more than 1 million, up from the 100,000 range, as enterprise requirements for scanning threat information climb.

“That’s one of the advantages of using hardware for offloading — being able to scan and match rules simultaneously. There are thousands of rules that people need to match for virus detection, spam detection, intrusion detection and prevention, etcetera,” Lutz says.

Another key attribute is what Tarari refers to as cut-though processing. “Even before the end of the data arrives at the board, the data begins to be processed immediately, which is a big improvement over our current implementation,” Lutz says. “You get a performance increase and a lot of latency reduction because of that.”

Tarari is expected to showcase its T10 technology at this week’s RSA conference in San Francisco. Content processors based on the T10 technology will be available beginning in March, starting with PCI-Express and HyperTransport boards. A family of ASICs based on T10 Technology will be generally available in the first quarter of 2008.

abednarz

Ann Bednarz is the executive editor of Network World. Ann is a longtime IT journalist and has spent 26 years writing and editing for Network World, where she has worked as a news reporter, managed product testing and reviews, and developed features and how-to articles for an audience of network professionals and data center managers. Over the last two years, she has conceived and edited award-winning content for Network World that includes 2025 Jesse H. Neal Award finalists, 2025 Azbee Award regional winners and national finalists, and 2024 Eddie & Ozzie Award finalists.

Ann holds a bachelor’s degree in architecture and spent the early part of her journalism career writing about architectural design and construction. In her free time, she keeps those skills alive through DIY projects.

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