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Intel revises its XPU strategy

News Analysis
May 25, 20234 mins
Data CenterGenerative AI

Intel is switching up its data-center processor roadmap, and its proposed combination CPU and GPU, code-named Falcon Shores, will now be a GPU chip only.

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Credit: iStock

Intel has announced a shift in strategy that impacts its XPU and data-center product roadmap.

XPU is an effort by Intel to combine multiple pieces of silicon into one package. The plan was to combine CPU, GPU, networking, FPGA, and AI accelerator and use software to choose the best processor for the task at hand.

That’s an ambitious project, and it looks like Intel is admitting that it can’t do it, at least for now.

Jeff McVeigh, corporate vice president and general manager of the Super Compute Group at Intel, provided an update to the data-center processor roadmap that involves taking a few steps back. Its proposed combination CPU and GPU, code-named Falcon Shores, will now be a GPU chip only.

“A lot has changed in the past 12 months. Generative AI is transforming everything. And from our standpoint, from Intel’s standpoint, we feel it is premature to be integrating the CPU and GPU for the next-generation product,” McVeigh said during a press briefing at the ISC High Performance Conference in Hamburg, Germany.

The former plan called for the CPU and GPU to be on the same development cycle, but the GPU could take longer to develop than the CPU, which would have meant the CPU technology would sit idle while the GPU was being developed. Intel decided that the dynamic nature of today’s market dictates a need for discrete solutions.

“I’ll admit it, I was wrong. We were moving too fast down the XPU path. We feel that this dynamic nature will be better served by having that flexibility at the platform level. And then we’ll integrate when the time is right,” McVeigh said.

The result is a significant change in Intel’s roadmap.

Intel in March scrapped a supercomputer GPU codenamed Rialto Bridge, which was to be the successor to the Max Series GPU, codenamed Ponte Vecchio, which is already on the market.

The new Falcon Shores chip, which is the successor to Ponte Vecchio, will now be a next-generation discrete GPU targeted at both high-performance computing and AI. It includes the AI processors, standard Ethernet switching, HBM3 memory, and I/O at scale, and it is now due in 2025.

McVeigh said that Intel hasn’t ruled out combining a CPU and GPU, but it’s not the priority right now. “We will at the right time … when the window of weather is right, we’ll do that. We just don’t feel like it’s right in this next generation.”

Other Intel news

McVeigh also talked up improvements to Intel’s OneAPI toolkit, a family of compilers, libraries, and programming tools that can execute code on the Xeon, Falcon Shores GPU, and Gaudi AI processor. Write once, and the API can pick the best chip on which to execute. The latest update delivers speed gains for HPC applications with OpenMP GPU offload, extended support for OpenMP and Fortran, and accelerated AI and deep learning.

On the supercomputer front, Intel has delivered more than 10,624 compute nodes of Xeon Max Series chips with HBM for the Aurora supercomputer, which includes 21,248 CPU nodes, 63,744 GPUs, 10.9PB of DDR memory, and 230PB of storage. Aurora is being built at the Lawrence Livermore National Labs and will exceed 2 exaFLOPs of performance when complete. When operational, it’s expected to dethrone Frontier as the fastest supercomputer in the world.

Intel also discussed servers from Supermicro that seem to be aimed at taking on Nvidia’s DGX AI systems. They feature eight Ponte Vecchio Max Series GPUs, each with 128 GB of HBM memory for more than 1 TB total of HBM memory per system. Not surprisingly, the servers are targeted at AI deployments. The product is expected to be broadly available in Q3.

Andy Patrizio is a freelance journalist based in southern California who has covered the computer industry for 20 years and has built every x86 PC he’s ever owned, laptops not included.

The opinions expressed in this blog are those of the author and do not necessarily represent those of ITworld, Network World, its parent, subsidiary or affiliated companies.

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