* Nanotech increases computer chip performance
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HP is touting a breakthrough in computer chip architecture that dramatically increases performance and reduces poor power consumption.
Using nanotechnology, HP is able to squeeze more than eight times the number of transistors onto field-programmable gate arrays (FPGA) and use less energy for computations than FPGAs currently being manufactured.
HP also claims that these chips could be used with the same sized transistors as those used in today’s FPGA designs, meaning that current fabrication facilities would be able to manufacture them with only minor modifications.
The technology – called field programmable nanowire interconnect (FPNI) – is a nanoscale crossbar switch that is layered over conventional CMOS. HP described it in a paper published in the Jan. 24 issue of Nanotechnology.
HP researchers conducted the research using classic modeling and simulation techniques, and is working on an actual chip that uses the approach. The company claims it could have a prototype within a year.
“As conventional chip electronics continue to shrink, Moore’s Law is on a collision course with the laws of physics,” said Williams, an HP senior fellow and director of quantum science research at HP Labs, in a statement. “Excessive heating and defective device operation arise at the nanoscale. What we’ve been able to do is combine conventional CMOS technology with nanoscale switching devices in a hybrid circuit to increase effective transistor density, reduce power dissipation, and dramatically improve tolerance to defective devices.”
The technology builds on a crossbar to CMOS connection technology developed by Dmitri Strukov and Konstantin Likharev of Stony Brook University in New York.
In FPNI, the CMOS performs all logic operations and the crossbar handles the signal routing in the circuit. Present FPGAs use between 80% and 90% of their CMOS for signal routing.
Because of the tiny size of the nanowires and crossbar switches, researchers claim relatively high defect rates. Since a crossbar interconnect is used, it is possible to route around these defects.
